DE1-SoC Overview
DE1-Soc Overview

Note: I chose to load the LXDXE Linux on the MicroSDcard

DE1-SoC Home Page

DE1-SoC Learning Roadmap

DE1-SoC Quick Start Guide

DE1-SoC Getting Started Guide

Note: the FPGA is the SCSEMA5 icon
Note: the HPS is the SOCVHPS icon

Section 4.2 Note: As of 15 Dec 2015, the most recent version of the UART driver is V2.12.10
Version of UART driver

Section 5.3 Note: The USB connector J13 is the "square" Max Blaster II type, NOT the micro USB connector used for the UART terminal

Section 5.3, the directory the QT Package is /usr/local/qt-4.8.5-altera-soc

In Section 6.3, be sure to tar and copy the /usr/local/qt-4.8.5-altera-soc to the flash drive, and then over to the HPS

Later in section 6.3,

  • In VmWare Ubuntu
  • cd /usr/local
  • sudo tar -jcv -f qt-4.8.5-altera-soc.tar.bz2 qt-4.8.5-altera-soc
  • In SoC HPS Ubuntu
  • cd /usr/local
  • tar -jxv -f qt-4.8.5-altera-soc.tar.bz2
  • ./hello -qws
Installing Vmware tools on Ubuntu

DE1-SoC Control Panel

Note: Section 7.1, be sure to use "open project"; the proper file is DE1_SOC_golden_top.qpf

Use open | file to view the DE1_SOC_golden_top.v file

Note: Section 7.2, the two files, quartus_cpf and sof_to_rbf.bat are located in the same directory as the DE1_SOC_golden_top.qpf Quartus project file

sof_to_rbf.bat:
%QUARTUS_ROOTDIR%\\bin64\\quartus_cpf -c DE1_SOC_golden_top.sof soc_system.rbf

Quartus Project files
Proper System Variables: [Use echo %VAR% in command.com to view]
  • QSYS_ROOTDIR c:\altera\13.1\quartus\sopc_builder\bin
  • QUARTUS_ROOTDIR c:\altera\13.1\quartus
  • SOPC_KIT_NIOS2 c:\altera\13.1\nios2eds

Note: The path for quartus_cpf.exe is %QUARTUS_ROOTDIR%\\bin64\\quartus_cpf

Note: I was unsuccessful in converting the soc file into a rbf file using either the typed command or the batch file.

Clock Pin Assignments

LED Pin Assingments

DE1-SoC User Manual

DE1-SoC My First FPGA

DE1-SoC My First HPS

Note: I ran into the Windows 8.1 "FAST_CWD" error; see for more assistance

main.c Makefile

DE1-SoC My First HPS FPGA

Note: Page 10, "connect the pio_led Reset Input to system reset"

Note: To export the Conduit signal, double click in the Export column of the pio_led external_connection

Detailed directions for Getting Started Guide

Detailed directions for My First FPGA

Detailed directions for My First HPS FPGA

Detailed directions for My SoC User Manual

Individual helps for Software Installation

Download the DE1-SoC CD
Most likely all the Yuba College kits are revision C. Click on the link "How to distinguish rev. B, rev. C, rev. D, rev. E and rev. F board" CD Download

PC Requirements
  • 64 bit Windows OS
  • Minimum of two USB ports

Recomended Order (Not Required)

Optional: Configure the MicroSD Ubuntu HPS

DE1-SoC GPIO

Configure Ubuntu MicroSDCard

DE1-SoC Projects

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